Category: Tandem

HPE NonStop architecture (Tandem Computers) by Era and Year

Mark Whitfield invested many years in the HPE NonStop field from 1990. The HPE NonStop architecture (originally Tandem Computers) is a legendary fault-tolerant system known for 100% continuous availability. The platform’s hardware and software execution evolved across six distinct eras and processor transitions:

1. The Tandem Founding Era (1976–1981)

  • Years: 1976–1981
  • Processors: Proprietary 16-bit stack processors (e.g., Tandem/16, NonStop II)
  • Architecture: The foundational “shared-nothing” parallel architecture. Featured redundant components (processors, disks, power supplies) connected by a proprietary dual-bus (Dynabus). The operating system provided instant automated failover.

2. The Cyclone & Early RISC Era (1981–1996)

  • Years: 1981–1996
  • Processors: Proprietary non-RISC (NonStop Cyclone) & MIPS R-series RISC
  • Architecture: Expanded into 32-bit computing. To keep pace with industry performance, Tandem transitioned from proprietary processors to off-the-shelf MIPS RISC processors while heavily emulating the original instruction set for compatibility.

3. The Himalaya/ServerNet Era (1997–2004)

  • Years: 1997–2004
  • Processors: MIPS R-series
  • Architecture: Replaced the legacy Dynabus with ServerNet, a high-speed system interconnect that served as an early precursor to modern networking fabrics. (Compaq acquired Tandem in 1997, which subsequently merged with HP in 2002).

4. The Integrity Itanium Era (2005–2013)

  • Years: 2005–2013
  • Processors: Intel Itanium (TNS/E)
  • Architecture: Branded as HP Integrity NonStop (NonStop i). The platform moved off proprietary silicon to standard Intel Itanium processors. This was driven by the “NonStop Advanced Architecture” (NSAA), lowering hardware costs while maintaining Availability Level 4 (AL4) standards.

5. The NonStop X (x86-64) Era (2014–Present)

  • Years: 2014–2026
  • Processors: Intel Xeon x86-64 (TNS/X)
  • Architecture: Fully decoupled the OS from proprietary hardware by shifting to standard Intel x86-64 processors and InfiniBand fabric. The latest compute nodes (such as the NS5 X5 and NS9 X5) utilize modern Intel Xeon Scalable processors to maintain maximum Availability Level 4 (AL4) workloads.

6. The Virtualized NonStop Era (Present)

  • Years: 2015–Present
  • Processors: Virtual Machines / Cloud / x86
  • Architecture: HPE extended the platform to support Virtualized NonStop Software, allowing fault-tolerant enterprise workloads to run entirely in private clouds via standard VMware or hybrid architectures, independent of specific physical servers.
Globally published HP NonStop journal – ‘The Connection’
HPE NonStop article by Mark Whitfield in 2013, working for Insider Technologies Limited in Salford Quays

Barclays Business Master II (BBM II), Tandem Computers (HPE NonStop) & sp/ARCHITECT

These terms map directly to the foundational 1990s technology stack behind Barclays Business Master II (BBM II), one of the UK’s earliest enterprise electronic desktop banking platforms.

Before the mainstream internet, this corporate banking infrastructure relied on specialized high-availability mainframe software to process secure corporate transactions.

🧱 Architectural Component Breakdown

  • Barclays Business Master (BBM / BBM II): A landmark corporate desktop electronic banking solution developed by Barclays Bank. It allowed businesses to dial directly into the bank to perform inter-account transfers, check balances, and automate book-keeping long before web browser banking became standard.
  • sp/ARCHITECT (or sp/ARCHITECT-BANK): The core electronic banking software package that powered BBM. It was originally engineered in the late 1980s and early 1990s by The Software Partnership (a UK-based fintech software house based in Runcorn that was later acquired by Deluxe Data). It eventually evolved into the widely known CONNEX advantage payment solution.
  • NonStop (Tandem Computers): The underlying hardware and operating system environment. Because banking infrastructure requires absolute uptime, sp/ARCHITECT was built to run on Tandem NonStop fault-tolerant computers (now HPE NonStop). These systems utilize a unique “shared-nothing” architecture to ensure zero transactional data loss.

💻 Legacy Technical Environment

During the era when BBM was deployed across Barclays’ tech hubs (such as Knutsford), developers working on this specific stack utilized highly specialized mainframe tools:

  • Languages: Code for sp/ARCHITECT was primarily written in TAL (Transaction Application Language) or COBOL85, which were native to the Tandem platform.
  • Interfaces: Early implementations integrated desktop client interactions with the Tandem host via middleware components like Tandem Pathway and Remote Server Call (RSC) facilities.

Barclays Business Master II (BBM II), Tandem Computers (HPE NonStop) & sp/ARCHITECT

I was assigned by Deluxe Data (International Operations), to the BBM II project between 1992 – 93.

mark whitfield thesoftwarepartnershipwingatehousenorthwaysmall

Deluxe Data, Wingate House, Northway, Runcorn

BITUG BIG SIG

The BITUG BIG SIG 2026 event is scheduled for Thursday, 4 June 2026.

Organized by the British Isles NonStop User Group (BITUG), this annual conference gathers HPE NonStop professionals, partners, and vendors across the region.

Event Details

  • Date: Thursday, 4 June 2026.
  • Location: Trinity House, London.
  • Key Focus Areas: HPE NonStop architecture roadmaps, technical breakout tracks, data security, and specialized data resiliency updates.
  • Attendees: The conference hosts end-users, system administrators, and developers, alongside community sponsors such as comforte, XYPRO, and ETI-NET.

Program Highlights

  • Breakout Tracks: Strategic vendor sessions outlining software developments and architectural security.
  • Networking: Collaborative environments allowing users to connect directly with senior HPE executives and product experts.
  • Admission: Complimentary registration is available for active end-user members. Official ticket registration and full session listings are hosted on the BITUG Big SIG Event Page.
The BITUG BIG SIG 2026 event is scheduled for Thursday, 4 June 2026.
The BITUG BIG SIG 2026 event is scheduled for Thursday, 4 June 2026

The BITUG BigSIG 2026 conference, hosted by the British Isles Tandem User Group at Trinity House, London, brings together the premier vendors within the HPE NonStop ecosystem. Key participating vendors and sponsors focus on data integration, compliance, zero-trust security, storage, and infrastructure management tailored for mission-critical enterprise systems.

The primary vendors participating in the 2026 HPE NonStop ecosystem event are organized by their specialization below.

🛡️ Data Security & Cyber Resilience

  • comforte AG: Serving as a key event sponsor, comforte AG hosts dedicated breakout sessions demonstrating tokenization strategies designed to secure sensitive data elements and enhance corporate data usability without breaking downstream application logic.
  • XYPRO Technology Corporation: A long-standing HPE NonStop security partner delivering compliance management, real-time threat detection, and risk mitigation tools. They focus heavily on enabling Zero-Trust architectures and automating compliance reporting for frameworks like PCI-DSS.
  • CSP (Compliance Systems Platforms): Specializes in vulnerability management, security hardening, and automated security compliance checking. They provide the administrative tools required to monitor audit logs and secure environments against internal and external threats.

🔄 Data Replication & Continuity

  • NTI (Network Technologies International): Presenting active strategies for multi-platform data distribution. NTI highlights methods for data movement away from legacy Oracle GoldenGate setups while integrating real-time HPE NonStop compute platforms with enterprise IT and agentic AI pipelines.
  • Gravic, Inc.: Promotes its HPE Shadowbase software line. Gravic focuses on high-availability business continuity, active-active data replication, data validation, and real-time streaming analytics for global telecommunications and financial exchanges.

💾 Backup, Storage & Infrastructure Management

  • ETI-NET: Showcases technical advancements inside its Sentinel and BackBox VTC software suites. ETI-NET’s 2026 showcase highlights immutable data tiering, object-locking architectures designed to resist ransomware, and AI/ML-driven anomaly detection within data backups.
  • TCM Solutions: Focuses on physical and virtual NonStop optimization. TCM specializes in hardware management, KVM hypervisor integrations for Virtualized NonStop environments, and transitioning infrastructure architecture over high-performance fabrics like InfiniBand.

💳 Application Modernization & Payments

  • OmniPayments: Showcases cloud-adjacent, high-volume payment processing switch architecture. They highlight transaction survivability, fraud prevention integrations, and end-to-end tokenization for multi-channel banking networks.
  • NuWave Technologies: Specializes in middleware solutions that connect HPE NonStop heritage code with modern RESTful web services. They focus heavily on API management as enterprise building blocks to quickly web-enable NonStop applications without rewriting backend logic.
  • 4tech Software: Delivers tactical operational monitoring, system auditing, and database performance management tools designed to keep NonStop SQL applications running with minimal administrative overhead.

European BASE24 User Group (EBUG) was a prominent, community-led organization

The European BASE24 User Group (EBUG) was a prominent, community-led organization dedicated to the ACI BASE24 payment processing system. It provided a vendor-neutral forum for IT professionals, banks, and processors to collaborate, share knowledge, and discuss technical tracks like HPE NonStop monitoring and payment security.

Conference Timeline

  • 1980s — Establishment: EBUG is formed as a regional community for European financial institutions utilizing the growing BASE24 platform.
  • Early 2000s — Technical Growth: EBUG annual conferences become prominent technical forums featuring specialized tracks focused on Tandem/HP NonStop hardware and payment system security.
  • 2007 — Istanbul Conference: Features heavily attended technical sessions and workshops addressing growing transaction volumes and early EMV (chip card) migrations.
European BASE24 User Group (EBUG) was a prominent, community-led organization
Insider Technologies regularly attended EBUG, booth in 2007
  • 2008 — Vienna Conference: Notable for introducing ACI’s strategic shift to support IBM platforms alongside traditional HPE NonStop environments.
European BASE24 User Group (EBUG) was a prominent, community-led organization
HP booth at Vienna EBUG, 2008
  • 2009 — Prague Conference: Continues strong advocacy and technical troubleshooting for BASE24 on NonStop despite broader industry platform shifts.
European BASE24 User Group (EBUG) was a prominent, community-led organization
HP Booth at Prague conference, 2009
  • 2012 — London TFG: A technical focus group is held in London at Trinity House, bringing together engineers and ACI product managers to debug and refine system architecture.
  • Late 2010s to Present — The “Everybody Belongs” Era: As ACI broadened its product portfolio, the user group expands its scope to include other payment technologies like Postilion. The conference formally rebrands as an independent entity, later transitioning into The Payments Knowledge Forum, to serve all payment systems users inclusively.

European BASE24 User Group (EBUG) was a prominent, community-led organization

HPE NonStop System Monitoring Reflex Product

HPE NonStop Reflex (often referred to as Reflex 80:20) is a graphical, integrated IT management suite developed by Insider Technologies. It provides continuous health monitoring, automated workflow management, and diagnostic logging for mission-critical HPE NonStop environments, serving as a single, consolidated “pane of glass” for fault-tolerant network operations.

Detailed Timeline Breakdown by Era & Year

The history of the NonStop Reflex suite closely mirrors the architectural evolution of the underlying HPE NonStop (originally Tandem) fault-tolerant hardware platforms.

1. The Tandem / ITUG Era (1989 – 1996)

  • 1989: Insider Technologies was founded in Salford Quays, Manchester, UK, establishing an early specialization in Tandem (NonStop) messaging software and message tracking utilities.
  • 1990s: As massive online transaction processing (OLTP) workloads grew, native Tandem utilities proved increasingly cumbersome. This spurred the initial development of platform diagnostic and event-filtering tools that would soon become the Reflex suite.
  • 1995: Insider Technologies actively codes and launches the initial iterations of Reflex 80:20, providing operators with an aggregated view of Tandem platform events.

2. The Compaq & Early HP Transition Era (1997 – 2014)

  • 1997: Compaq acquires Tandem Computers. Reflex 80:20 begins updating its backend architecture to handle ServerNet clustering and the newly combined enterprise platforms.
  • 2002: Hewlett-Packard (HP) acquires Compaq. HP begins the hardware migration from proprietary processors to Intel Itanium (HP Integrity NonStop).
  • 2004: Insider Technologies formalizes its ongoing product development, heavily pushing both Reflex 80:20 and releasing new variants like Reflex ONE24 to support extended tracking for ATM and POS networks.
  • 2007: Reflex and other Insider monitoring software platforms are highly integrated into FIS solutions, serving tier-one global banks and stock exchanges.
  • 2013: Insider Technologies solidifies the Reflex 80:20 status as the ultimate consolidated replacement for legacy HP components, publishing technical insights in dedicated NonStop journals.

3. The Modern HPE & x86 Era (2014 – 2019)

  • 2014: Hewlett Packard Enterprise (HPE) is formed and officially launches NonStop X, moving the architecture onto standard Intel x86-64 processors. Reflex 80:20 interfaces are updated to support InfiniBand fabrics and the newer Open System Services (OSS) environments.
  • 2017 – 2019: HPE launches Virtualized NonStop (vNS), bringing continuous application fault tolerance directly to private and hybrid clouds. Reflex adapts its system management capabilities to securely monitor both physical x86 non-stop servers and virtual hypervisor instances.

4. The AI & Hybrid Cloud Era (2020 – 2026)

  • 2020: HPE ends the sale of older Itanium-based platforms. Reflex fully commits its diagnostic support to modern HPE NonStop X and vNS environments.
  • 2023 – 2024: The NonStop platform embraces AI integrations, expanded SQL/cloud workloads, and integrations with modern DevOps tools. Reflex tools receive updates to accommodate enhanced cyber resilience tracking and modern API-driven services.
  • 2025: HPE celebrates 50 years of the fault-tolerant NonStop computing ecosystem. The Reflex suite provides compatibility for the upgraded, high-capacity hardware iterations running the L25 series OS.
  • 2026: Reflex remains a staple ecosystem management suite for complex enterprise networks, processing and escalating exception conditions, EMS events, and subsystem alerts within the highly available HPE GreenLake consumption models.

The Insider RTLX product at ETI-NET is now called C-Deep for Transaction Monitoring;

C-Deep (Transaction Monitoring)

The Insider Reflex product at ETI-NET is now called Sentinel for NonStop Monitoring;

Sentinel (Nonstop Monitoring)

C-Deep for Transaction Monitoring & Sentinel for HPE NonStop Monitoring

BASE24 and BASE24-eps architecture overview

The BASE24 electronic payment system developed by ACI Worldwide exists in two primary architectural generations:

BASE24 Classic (historically deployed on HPE NonStop / Tandem fault-tolerant hardware) and

BASE24-eps (Enterprise Payments System, built using an object-oriented C++ framework deployable across open systems, z/OS, and cloud infrastructure).

Despite structural differences, both share a highly optimized, component-based transaction routing engine.

BASE24 and BASE24-eps architecture overview
BASE24 architecture overview

Core Structural Component Layers

The component architecture maps the complete end-to-end lifecycle of a financial message (such as ISO 8583) through five distinct functional sub-systems:

1. Network & Message Routing Component (XPNET)

  • Purpose: Coordinates all message traffic across internal processes and physical network nodes.
  • Function: Operates as a specialized middleware network manager that decouples low-level communication links from upper transaction routing layers.
  • Configuration: Relies on a Logical Network Configuration File (LCONF) to define active execution nodes, hardware lines, and physical stations.

2. Perimeter Access Layer (Device Handlers)

  • Purpose: Translates device-specific message protocol formats into the system’s unified internal format.
  • ATM Device Handlers (ATMDH): Manage direct connectivity to automated teller machines, unpack specific vendor dialects (such as Diebold or NCR states), and track terminal hardware statuses.
  • POS Device Handlers (POSDH): Interface with point-of-sale acquirer terminals and merchants.
  • Security Operations: Triggers immediate payload encryption/decryption and Hardware Security Module (HSM) PIN-block translation directly within this ingestion ring.

3. Core Transaction Logic (Authorization System)

  • Purpose: Determines whether a payment request should be accepted, rejected, or modified.
  • Full On-Us Authorization: Inspects internal databases for matching account records, positive balances, and velocity thresholds to issue real-time decisions.
  • Parametric/Negative Checks: Validates card status against offline negative files, usage restrictions, or custom risk parameters.
  • Scripting Engine: Modern BASE24-eps variants execute localized transaction routing scripts via customized operators without forcing a compile rewrite of the core engine core.

4. Boundary Channels (Interchange & Host Interfaces)

  • Interchange Interfaces (ICH): Package and transform the transaction payload into international network profiles (e.g., Visa, Mastercard, regional switches). It handles strict message mapping and regional network check requirements.
  • Host Interfaces (HIF): Create synchronous links back to an institution’s underlying Core Banking system to apply ledger adjustments, check balances, or execute real-time holds.

5. Offline & Administrative Subsystems

  • Extract Component: Gathers active transaction logs and streams filtered payloads out to analytical reporting databases.
  • Refresh Component: Updates terminal operational data, key packages, and card exclusion lists from parent systems down to active execution nodes.
  • Settlement Initiator: Groups, cleanses, and batches net-clearing totals to finalize payment entries into regional clearinghouses.

Architectural Divergence: Classic vs. EPS

The structural design varies significantly depending on the generation of the software deployment:

BASE24 and BASE24-eps architecture overview
BASE24 and BASE24-eps architecture overview

End-to-End Component Transaction Flow

  1. An ATM transaction arrives at the network interface layer managed by XPNET.
  2. The message is routed to the Device Handler, which strips hardware packaging and requests translation from the HSM.
  3. The clean internal message passes to the Authorization Engine.
  4. If it is a “Not-On-Us” card, the engine identifies the destination BIN and transfers routing control to the Interchange Interface.
  5. The Interchange Interface maps the payload to the external scheme standard (such as Visa) and transmits it to the external network.
  6. The outbound network response is unwrapped by the Interchange component and tracked through the core engine to log final response codes.
  7. The transaction safely records inside the active log file, allowing the Extract / Settlement components to pick it up later during batch processing.

BASE24 and BASE24-eps architecture overview

BASE24 and BASE24-eps architecture overview
BASE24 and BASE24-eps architecture overview

HPE NonStop MultiBatch Batch Job Scheduling Overview and Timeline

Overview

MultiBatch is a robust enterprise workload automation and job scheduling tool designed specifically for the HPE NonStop parallel architecture. Developed originally by Insider Technologies and subsequently managed/distributed alongside partners like ETI-NET, it enables organization-wide task automation.

MultiBatch provides high-performance, concurrent execution of batch schedules across multiple nodes. It natively supports both Guardian and OSS environments. By utilizing modern graphical user interfaces (GUIs) alongside traditional Pathway components, it eliminates the need for complex, manual, and high-maintenance TACL or JCL scripts.

Core Technical Capabilities

  • Parallel Execution: Uses NonStop architecture to execute batch workloads concurrently across one or multiple nodes.
  • Advanced Scheduling: Drives automated tasks based on time parameters, complex intervals, custom calendars, and direct cross-job dependencies.
  • Reusable Infrastructure: Environment classes—including PARAM, ASSIGN, DEFINE, FD, and environmental variables—can be configured once and safely shared across various jobs.
  • Inbuilt Disaster Recovery: Features automated, built-in monitor recovery mechanisms to preserve execution integrity during hardware or connection failures.
  • Seamless Migration: Simplifies moving production workloads between environments via a deep migration utility that automatically handles environmental translation without manual intervention.

Timeline Breakdown by Year and Version

The evolution of MultiBatch highlights its transition toward broader configuration capacities, simplified environment integrations, and eventual product lifecycle milestones.

2020: Operational and Security Consolidation

  • Version Focus: Pre-v10 Infrastructure (Enterprise Deployments)
  • Key Enhancements:
    • Formalized rigid separation of internal user roles, establishing MBAT.OPS for view-only status monitoring and MBAT.CONFIG for structural schedule maintenance.
    • Refined the “Migrator” module, eliminating manual TACL operations when extracting and inserting batch definitions across network test and production nodes.
    • Added capabilities allowing all MultiBatch jobs to execute securely under the system Batch Monitor Process (BMON) owner or explicitly assigned application user IDs.

2022 (November): MultiBatch Version 10.0 Launch

  • Version Focus: Architecture Restructuring
  • Key Enhancements:
    • Define Classes: Introduced reusable Define Classes to group environments cleanly.
    • Scale Upgrades: Upgraded the main Batch Monitor (BMON) subsystem to actively scale up to 2,500 jobs concurrently.
    • Parameterization: Modified the core configuration boundaries and decoupled utility processes (MBPARHK) to seamlessly process non-step related records across database structures.
    • Clean Up: Formally deprecated legacy components including UTCSV to reduce technical debt.

2023 (February): MultiBatch Version 10.1 Refinement

  • Version Focus: OSS Overhaul & Operational Control
  • Key Enhancements:
    • OSS Reworking: Re-engineered and optimized support for Open System Services (OSS) processes, granting them equal parity with traditional Guardian tasks.
    • On-Demand Execution: Enabled ad-hoc “On Demand Job” invocation directly through user channels without altering master schedules.
    • Conditional Variables: Extended character limits for Conditional Parameter values up to 100 characters.
    • Subsystem Unification: Consolidated Event Timer processing and Conditional Parameters fully into standard MultiBatch menus, auditing frameworks, and security tracking.
    • Control Commands: Integrated the SWITCH BMON command line directive to easily pass control between operational monitors.
    • Interface Upgrade: Rolled out an entirely new Ops GUI Server to modernize scheduling visibility.

Current Era: Version 10.2 Maintenance & Commercial Sunset

  • Version Focus: Version 10.2 / Product Lifecycle Transition
  • Key Milestones:
    • MultiBatch 10.2: Operates as the current, stable production tier delivered via ETI-NET, featuring deep parameterization and centralized network deployment protocols.
    • Commercial End of Life: As of March 1, 2026, new software licenses for Multi-Batch are no longer available for purchase. The software has officially reached the end of its commercial sales life.
    • Ongoing Support: Existing license holders retain full permission to execute, maintain, and run the product inside their environments according to their long-term licensing agreements.

HPE NonStop MultiBatch Batch Job Scheduling Overview and Timeline

sp/ARCHITECT was a pioneering electronic banking & funds-transfer software suite

sp/ARCHITECT was a pioneering electronic banking and funds-transfer software suite. Originally built by the UK-based Software Partnership (TSP), it ran natively on fault-tolerant Tandem (now HPE NonStop) systems. It provided highly available transaction routing and real-time electronic book-keeping for major international financial institutions.

Detailed Timeline by Era and Year

1. The Genesis & Independent Era (Mid-1980s – 1989)

  • Mid-1980s: The Software Partnership (TSP) is co-founded in Timperley, UK. Development begins on sp/ARCHITECT, designed with a client-server architecture.
  • 1986: Tandem launches NonStop SQL, providing the underlying high-availability relational database foundation that sp/ARCHITECT relied upon to ensure absolute data integrity for banks.

2. Mainstream Banking Adoption Era (1990 – 1994)

  • 1990: TSP relocates to Norton House in Runcorn, UK. sp/ARCHITECT achieves production deployment and is widely utilized for inter-account transfers and book-keeping by major banks like TSB and Bank of Scotland.
  • 1992: Due to rapid expansion, the Runcorn operations relocate to Wingate House.
  • 1994: Deluxe Electronic Payment Systems (a subsidiary of Deluxe Corporation) acquires TSP to expand its global electronic funds transfer (EFT) footprint. The platform is globally marketed and supported, expanding to clients like Rabobank.
1990: TSP relocates to Norton House in Runcorn
1990: TSP relocates to Norton House in Runcorn
1992: Due to rapid expansion, the Runcorn operations relocate to Wingate House.
1992: Due to rapid expansion, the Runcorn operations relocate to Wingate House.

3. Global Expansion & Compaq Transition Era (1995 – 2005)

  • 1995 – 1997: The Runcorn-based team (operating as Deluxe Data) codes additional regional adaptations of sp/ARCHITECT for banks worldwide (e.g., Girofon in Denmark).
  • 1997: Compaq acquires Tandem Computers, placing sp/ARCHITECT on Compaq’s enterprise roadmap.
  • 2002: Hewlett-Packard (HP) acquires Compaq, absorbing the Tandem platform into the HP Integrity server line. The application undergoes adaptation to integrate modern Windows-based management systems (like DSM/NOW).

4. The HPE Modernization & Hybrid Era (2014 – 2026)

  • 2014: HPE (Hewlett Packard Enterprise) is formed, spinning off from HP. NonStop shifts to Intel x86-64 architecture (NonStop X), requiring sp/ARCHITECT and related Tandem subsystems (like Pathway, COBOL, and TAL) to modernize for TNS/X processing.
  • 2020: Legacy Itanium-based environments are phased out. sp/ARCHITECT systems, if still active, are migrated to virtualized NonStop (vNS) and operated within private cloud infrastructures.
  • 2025/2026: HPE NonStop celebrates its 50th Anniversary. Applications originally designed on the sp/ARCHITECT schema are heavily evaluated for AI integration, continuous cyber resilience, and consumption-based models like HPE GreenLake.