HPE NonStop Tandem Programming Languages and Development Timeline

The development of programming languages on the HPE NonStop platform (originally founded as Tandem Computers) is tightly bound to its architectural hardware transitions: from custom CISC stack machines to MIPS RISC, Intel Itanium, and eventually standard Intel x86-64 infrastructures.


Detailed List of NonStop Programming Languages

1. Core Proprietary & System Languages

  • TAL (Transaction Application Language): The foundational system programming language for Tandem. It is a block-structured, machine-dependent procedural language designed to compile directly into highly efficient machine instructions. It features ALGOL/Pascal-like syntax but implements C-like semantics, structural pointers, and weak data typing.
  • pTAL & epTAL: Specialized evolutions of TAL. Rather than rewriting legacy codebases from scratch during architecture shifts, pTAL was introduced to compile existing TAL code natively into MIPS RISC architectures. Later, epTAL was developed to target Intel Itanium microprocessors.
  • TACL (Tandem Advanced Command Language): A built-in command interpreter and interpreted scripting language. It functions like a Unix Bash shell but features highly complex macro capacities used to orchestrate system configurations, monitor processes, and automate failover procedures.

2. Enterprise & Enterprise Legacy Languages

  • COBOL85 (and older COBOL74): The undisputed workhorse of NonStop commercial workloads. HPE’s tailored implementation of the COBOL85 standard natively interfaces with the Guardian OS. It allows programmers to embed SQL/MP statements and program fault-tolerant Process Pairs through HPE NonStop Pathway (TS/MP).
  • SCOBOL (Screen COBOL): A specialized, high-level structural derivative of COBOL utilized exclusively to build blocks for character-cell terminal interfaces (such as the 6530 terminal environments) running within Pathway architectures.
  • NonStop SQL (SQL/MP and SQL/MX): While technically a database system, its embedded syntax acts as a declarative language integrated into C and COBOL. SQL/MP works with the legacy Guardian file system, while SQL/MX brings ANSI-compliant SQL closely bound with the Open System Services (OSS) environment.

3. Standard Mainstream Languages

  • C & C++: Heavily introduced during the RISC transition to allow software portability. Mainstream development on modern NonStop systems uses standard C/C++ cross-compilers. They run in either the native fault-tolerant Guardian personality or the standard POSIX-compliant Open System Services (OSS) environment.
  • Java: A first-class language layer deployed natively on NonStop. HPE optimizes the Java Virtual Machine (JVM) to scale across multi-CPU shared-nothing frameworks, allowing modern enterprise web apps to run with out-of-the-box system availability.

4. Modern Open-Source Options

  • Python, Go, & JavaScript (Node.js): Modern procedural and script utilities provided by HPE. These environments leverage the OSS POSIX platform layer, running modern DevOps orchestration, microservices, and hybrid-cloud pipelines alongside the native database engines.

Detailed Timeline Breakdown by Era and Year

The evolution of NonStop languages maps directly across distinct engineering ownership eras.

The Proprietary Foundation Era (Tandem Computers: 1974–1989)

  • 1976: Tandem ships the original Tandem/16 (NonStop I). TAL is the only available language on the platform. The entire Guardian Operating System is written completely in TAL.
  • 1981: The NonStop II hardware is introduced. Tandem expands language support to include COBOL74, FORTRAN, and BASIC to attract mainstream banking clients.
  • 1983: Tandem releases the Transaction Monitoring Facility (TMF) and Pathway application management software. SCOBOL is introduced alongside them to program secure terminal entry interfaces.
  • 1985: TACL is deployed, completely modernizing the command line shell ecosystem with scalable macros and structured operational control.
  • 1986: Tandem launches NonStop SQL, the first linearly scalable, fault-tolerant relational database engine. Embedded SQL syntax is integrated directly into TAL and COBOL compilers.
  • 1988: Compilers undergo a major update to natively support the newly established COBOL85 standard, which quickly replaces COBOL74 for all mission-critical banking transactions.

The Open Systems & Hardware Transition Era (Compaq: 1990–2001)

  • 1991: Hardware migrates from CISC stacks to MIPS RISC architectures with systems like the Cyclone/R. To protect client software assets, Tandem delivers the pTAL compiler to translate TAL source code into native RISC binaries.
  • 1995: Tandem introduces Open System Services (OSS), a POSIX-compliant UNIX subsystem running over the Guardian kernel. This brings full-scale, native native compliance for standard ANSI C and C++ programming.
  • 1997: Compaq acquires Tandem Computers. Engineering shifts heavily toward implementing Java on NonStop, targeting cross-platform, enterprise internet-banking codebases.
  • 2000: NonStop SQL/MX is released. It allows developers to use embedded SQL statements within standard C, C++, and emerging Java applications inside the OSS runtime environment.

The Corporate Alignment & Itanium Era (Hewlett-Packard: 2002–2014)

  • 2002: HP merges with Compaq. Java is designated as a first-class citizen on the platform, receiving deeper optimization to tie into native clusters seamlessly.
  • 2005: HP releases the Integrity “NonStop i” servers, moving processors away from MIPS onto Intel Itanium architectures. The epTAL compiler is rolled out alongside standard C/C++ updates to seamlessly compile older environments onto Itanium.
  • 2011: Open-source scripting engines, including early ports of modern Python, are introduced to the OSS environment, easing the system-management burden for engineers unfamiliar with legacy TACL.

The Modern Enterprise Era (Hewlett Packard Enterprise: 2015–2026)

  • 2015: HP splits, and the platform transitions to HPE. Standard Intel x86-64 hardware dominates with the NonStop X architecture. Compilers utilize an standard GCC/LLVM-based back end, allowing normal Linux/Unix C++ programs to build on NonStop with minimal alteration.
  • 2020: Sales of Itanium systems officially terminate. Legacy languages like TAL are deprecated for new software creation but are preserved to support older, foundational logic.
  • 2023–2024: HPE rolls out modern cloud-ready DevOps Starter Kits. Full, native support is added for modern languages such as Go, modern Python 3.x, and Node.js, allowing them to integrate into modern automated CI/CD build environments.

HPE NonStop Tandem Programming Languages and Development Timeline

HPE NonStop MultiBatch is an advanced workload automation & scheduling manager

HPE NonStop MultiBatch is an advanced workload automation and scheduling manager designed explicitly for mission-critical HPE NonStop environments. Originally created to support complex scheduling needs in banking and finance, it automates job flows and parallel processing across multiple CPUs.

Detailed Description

The original NonStop batch scheduler (NetBatch) was built for basic sequential job queues. As large enterprises required deeper integration with databases, real-time events, and complex parallel schedules, MultiBatch (developed originally by Insider Technologies, now part of ETI-NET) emerged.

  • Core Functions: It automates job submission, tracks job flow, handles conditional parameters, manages event timers, and triggers jobs “On Demand” based on real-time system events.
  • High Availability: Like the underlying HPE NonStop system, MultiBatch is engineered for fault tolerance, ensuring automated workflows do not fail due to hardware or software interruptions.
  • Enterprise Integration: It supports Open System Services (OSS) and standardizes auditing, security, and menu-based operations across distributed NonStop systems.

Breakdown by Year / Era

The evolution of MultiBatch parallels the architectural changes of the HPE NonStop platform.

1985–1990s: Tandem Era & Origin

  • 1985: Conceived. MultiBatch was developed by Insider Technologies specifically to meet the complex batch schedule demands of large financial institutions that exceeded native NetBatch capabilities.
  • Early 1990s: The system was officially rolled out for Tandem processors to automate transaction data loads and daily reconciliation tasks for ATMs and financial ledgers.

1997–2014: Compaq & Early HP Era

  • 1997: Following Compaq’s acquisition of Tandem, MultiBatch was adapted to support the NonStop Himalaya systems and server software, which expanded data and network scaling.
  • 2000s: During the HP Itanium and MIPS Era, MultiBatch evolved to support more dynamic processing pools and expanded job limits, increasing fault tolerance under the HP-UX integrated environment.

2014–2020: Transition to NonStop X & Modernization

  • 2014: As HPE shifted the platform to standard Intel x86-64 processors (NonStop X), MultiBatch was updated for L-series operating systems to run efficiently on high-speed InfiniBand fabrics.
  • 2019: Insider Technologies made significant updates to MultiBatch to modernize the GUI and improve code stability for the new generation of NonStop users transitioning to X-series hardware.

2020–Present: MultiBatch 10 & 10.2

  • 2023: MultiBatch 10 was released. It included a new Operations GUI Server, significantly increased configuration limits (e.g., supporting up to 2,500 jobs), enhanced conditional parameters, improved processing of Open System Services (OSS), and “On Demand” job capabilities.
  • 2025: MultiBatch 10.2 was released by ETI-NET. This update focused heavily on digital resilience, providing deep alignment with the NIST Cybersecurity Framework to protect against operational and cyber threats.
  • Current Status: Fully integrated into modern systems supporting the HPE GreenLake consumption-based cloud model, MultiBatch 10.2 serves as the primary automation engine for large enterprises executing complex HTAP (Hybrid Transaction/Analytical Processing) workloads.

The Software Partnership was a highly specialized software house in Runcorn

The Software Partnership (TSP) was a highly specialized British software house based in Runcorn, Cheshire, that played a key role in early cutting-edge electronic banking software. The firm famously developed sp/ARCHITECT-BANK, an innovative enterprise banking system built explicitly for Tandem Computers (now HPE NonStop) fault-tolerant server systems. I was based there between 1990 and 1995.

The Software Partnership Logo, Runcorn Software House, Deluxe Data
The Software Partnership Logo

Below is a detailed overview of the company’s operational history, alongside the corresponding hardware/software architectural eras of the HPE NonStop platform it relied upon.


Detailed Overview

  • Core Focus: The Software Partnership specialized in online transaction processing (OLTP) and electronic automated banking software. Long before the internet became mainstream, TSP engineered early desktop access environments for corporate bookkeeping and inter-account bank transfers.
  • Key Product: Its flagship software suite, sp/ARCHITECT, ran on Tandem’s highly unique, redundant architecture. The software handled complex high-volume retail transactions, ATM networking, and ledger balances.
  • Major Clients: High-profile financial institutions deployed TSP’s systems, including TSB (Trustee Savings Bank), Bank of Scotland, Rabobank, and Denmark’s Girofon.
  • Legacy: TSP initiated a massive lineage of financial tech operations in the Runcorn/Warrington area. After subsequent buyouts and transitions, its corporate DNA integrated into modern banking giants, eventually operating under Fidelity National Information Services (FIS).

Detailed Timeline by Era and Year

The history of TSP mirrors the evolution of the underlying fault-tolerant architecture originally built by Tandem, later managed by Compaq, HP, and currently Hewlett Packard Enterprise (HPE).

Era 1: The Tandem Founding & TSP Inception (Mid-1970s – 1989)

This era is marked by Tandem’s creation of the fault-tolerant server market, which birthed the niche that TSP filled.

  • 1974–1976: Tandem Computers is founded and ships its first 16-bit NonStop I (T/16) system, utilizing complete component redundancy to guarantee close to zero downtime for the financial industry.
  • 1981: Tandem introduces the NonStop II, transitioning to battery-backed DRAM memory and enabling early 32-bit addressing.
  • Mid-1980s: The Software Partnership (TSP) is co-founded by Nigel Walsh. It establishes offices first in Timperley (Wingate Drive), then moves to Crowngate (Norton House) in Runcorn. The team begins developing online banking architectures explicitly for Tandem OS (Guardian) and early UNIX nodes.
  • 1989: Tandem launches the NonStop Cyclone, a high-end mainframe system featuring superscalar CPUs and fiber-optic interconnects.

Era 2: The MIPS RISC Transition & Corporate Buyouts (1990 – 1999)

TSP reaches peak software deployment exactly as Tandem shifts its internal processor technology.

  • 1990: TSP establishes itself as a major regional employment hub for software engineers following a massive boom in terminal banking technology. Software programmers deploy sp/ARCHITECT-BANK code for massive retail banks internationally.
  • 1991: Tandem shifts its structural hardware away from proprietary chips, introducing its first MIPS RISC-based NonStop systems.
  • 1992: TSP expands its Runcorn footprint, moving to custom facilities at Wingate House on Northway, Runcorn.
  • 1994: TSP is acquired by American firm Deluxe Electronic Payment Systems (a division of Deluxe Corporation, one of the largest check printers and transaction processors in the US). The corporate name transitions to Deluxe Data.
  • 1997: Due to shifts in the enterprise hardware landscape, Compaq Computer Corporation acquires Tandem Computers for $3 billion, taking over the NonStop lineage.

Era 3: The Itanium Migration & eFunds Realignment (2000 – 2013)

The architecture sheds its proprietary processors for industry standards, and TSP’s corporate legacy transforms.

  • 2000: Deluxe Data’s electronic payment wing splits off and rebrands as EFD eFunds.
  • 2001–2002: HP (Hewlett-Packard) merges with Compaq, absorbing the NonStop portfolio. Simultaneously, HP begins shifting NonStop servers from MIPS architectures to Intel Itanium processors.
  • 2007: Following industry consolidation, the corporate remnants of the original TSP Runcorn operations are absorbed into Fidelity National Information Services (FIS) and relocated to Aegon House in Daresbury, Warrington.

Era 4: The Modern HPE NonStop X & Virtualization Era (2014 – Present)

The legacy of the high-availability software pioneered in Runcorn culminates in cloud and x86 integration.

  • 2014: HP introduces NonStop X, completely migrating the underlying architecture to Intel x86-64 processors and implementing InfiniBand connectivity fabrics.
  • 2015: Hewlett-Packard officially splits into two entities; the core mission-critical banking platform continues its five-decade lineage under Hewlett Packard Enterprise (HPE).
  • 2020s–Present: HPE modernizes the software architecture to support Virtualized NonStop Software (vNS). Modern variants allow banking systems to run mission-critical apps seamlessly inside enterprise private clouds and scalable HPE GreenLake consumption models with 100% fault tolerance.
Deluxe Data International Operations, Wingate House, Northway, Runcorn, Cheshire
Deluxe Data International Operations, Wingate House, Northway, Runcorn, Cheshire
The Software Partnership, Norton House, Crowngate, Runcorn, Cheshire
The Software Partnership, Norton House, Crowngate, Runcorn, Cheshire

⚙️ sp/ARCHITECT

sp/ARCHITECT (specifically sp/ARCHITECT-BANK) was a foundational electronic banking and transaction framework engineered in the 1990s by The Software Partnership (a UK-based fintech house later acquired by Deluxe Data). It primarily powered corporate banking portals and telephone-driven banking services.

The platform acted as highly reliable middleware, serving as a bridge between the customer and back-end banking mainframes. The breakdown of its architecture, infrastructure, and core functions includes:

⚙️ Architectural Breakdown

  • Hardware & OS: Built to run natively on fault-tolerant Tandem NonStop computers (now HPE NonStop). This “shared-nothing” architecture was designed for absolute transactional uptime and zero data loss.
  • Programming Languages: Built using legacy enterprise standards. Code was primarily written in COBOL85 and TAL (Transaction Application Language) native to the Tandem ecosystem.
  • Middleware Integration: Utilized Tandem-specific middleware like Pathway and Remote Server Call (RSC) to handle client-to-host communications.

💻 Core Capabilities & Modules

  • Electronic Delivery Framework: Served as a multi-channel framework, accommodating a wide variety of early access devices like desktop clients, UNIX workstations, and smart phones.
  • Transaction Handlers: Deployed custom scripts/handlers that enabled end-users to securely access real-time account data and perform early inter-account transfers without visiting a physical branch.
  • Testing Utilities: Included proprietary simulation tools like sp/TESTBED, acting as a PC-to-host test harness so developers could emulate user queries and transaction flows.

🏦 Industry Footprint

  • European Rollout: Heavily adopted by large European financial institutions, including TSB, Rabobank, Bank of Scotland, and Girofon.
  • BBM II Integration: Powered landmark corporate desktop banking solutions like Barclays Business Master II (BBM II), long before modern web browser banking existed.
  • Evolution: Following its acquisition, its design philosophies eventually evolved into Deluxe Data’s broader CONNEX suite of payment solutions.

HPE NonStop architecture (Tandem Computers) by Era and Year

Mark Whitfield invested many years in the HPE NonStop field from 1990. The HPE NonStop architecture (originally Tandem Computers) is a legendary fault-tolerant system known for 100% continuous availability. The platform’s hardware and software execution evolved across six distinct eras and processor transitions:

1. The Tandem Founding Era (1976–1981)

  • Years: 1976–1981
  • Processors: Proprietary 16-bit stack processors (e.g., Tandem/16, NonStop II)
  • Architecture: The foundational “shared-nothing” parallel architecture. Featured redundant components (processors, disks, power supplies) connected by a proprietary dual-bus (Dynabus). The operating system provided instant automated failover.

2. The Cyclone & Early RISC Era (1981–1996)

  • Years: 1981–1996
  • Processors: Proprietary non-RISC (NonStop Cyclone) & MIPS R-series RISC
  • Architecture: Expanded into 32-bit computing. To keep pace with industry performance, Tandem transitioned from proprietary processors to off-the-shelf MIPS RISC processors while heavily emulating the original instruction set for compatibility.

3. The Himalaya/ServerNet Era (1997–2004)

  • Years: 1997–2004
  • Processors: MIPS R-series
  • Architecture: Replaced the legacy Dynabus with ServerNet, a high-speed system interconnect that served as an early precursor to modern networking fabrics. (Compaq acquired Tandem in 1997, which subsequently merged with HP in 2002).

4. The Integrity Itanium Era (2005–2013)

  • Years: 2005–2013
  • Processors: Intel Itanium (TNS/E)
  • Architecture: Branded as HP Integrity NonStop (NonStop i). The platform moved off proprietary silicon to standard Intel Itanium processors. This was driven by the “NonStop Advanced Architecture” (NSAA), lowering hardware costs while maintaining Availability Level 4 (AL4) standards.

5. The NonStop X (x86-64) Era (2014–Present)

  • Years: 2014–2026
  • Processors: Intel Xeon x86-64 (TNS/X)
  • Architecture: Fully decoupled the OS from proprietary hardware by shifting to standard Intel x86-64 processors and InfiniBand fabric. The latest compute nodes (such as the NS5 X5 and NS9 X5) utilize modern Intel Xeon Scalable processors to maintain maximum Availability Level 4 (AL4) workloads.

6. The Virtualized NonStop Era (Present)

  • Years: 2015–Present
  • Processors: Virtual Machines / Cloud / x86
  • Architecture: HPE extended the platform to support Virtualized NonStop Software, allowing fault-tolerant enterprise workloads to run entirely in private clouds via standard VMware or hybrid architectures, independent of specific physical servers.
HPE NonStop article by Mark Whitfield in 2013, working for Insider Technologies Limited in Salford Quays

HPE NonStop System Monitoring Reflex Product

HPE NonStop Reflex (often referred to as Reflex 80:20) is a graphical, integrated IT management suite developed by Insider Technologies. It provides continuous health monitoring, automated workflow management, and diagnostic logging for mission-critical HPE NonStop environments, serving as a single, consolidated “pane of glass” for fault-tolerant network operations.

Detailed Timeline Breakdown by Era & Year

The history of the NonStop Reflex suite closely mirrors the architectural evolution of the underlying HPE NonStop (originally Tandem) fault-tolerant hardware platforms.

1. The Tandem / ITUG Era (1989 – 1996)

  • 1989: Insider Technologies was founded in Salford Quays, Manchester, UK, establishing an early specialization in Tandem (NonStop) messaging software and message tracking utilities.
  • 1990s: As massive online transaction processing (OLTP) workloads grew, native Tandem utilities proved increasingly cumbersome. This spurred the initial development of platform diagnostic and event-filtering tools that would soon become the Reflex suite.
  • 1995: Insider Technologies actively codes and launches the initial iterations of Reflex 80:20, providing operators with an aggregated view of Tandem platform events.

2. The Compaq & Early HP Transition Era (1997 – 2014)

  • 1997: Compaq acquires Tandem Computers. Reflex 80:20 begins updating its backend architecture to handle ServerNet clustering and the newly combined enterprise platforms.
  • 2002: Hewlett-Packard (HP) acquires Compaq. HP begins the hardware migration from proprietary processors to Intel Itanium (HP Integrity NonStop).
  • 2004: Insider Technologies formalizes its ongoing product development, heavily pushing both Reflex 80:20 and releasing new variants like Reflex ONE24 to support extended tracking for ATM and POS networks.
  • 2007: Reflex and other Insider monitoring software platforms are highly integrated into FIS solutions, serving tier-one global banks and stock exchanges.
  • 2013: Insider Technologies solidifies the Reflex 80:20 status as the ultimate consolidated replacement for legacy HP components, publishing technical insights in dedicated NonStop journals.

3. The Modern HPE & x86 Era (2014 – 2019)

  • 2014: Hewlett Packard Enterprise (HPE) is formed and officially launches NonStop X, moving the architecture onto standard Intel x86-64 processors. Reflex 80:20 interfaces are updated to support InfiniBand fabrics and the newer Open System Services (OSS) environments.
  • 2017 – 2019: HPE launches Virtualized NonStop (vNS), bringing continuous application fault tolerance directly to private and hybrid clouds. Reflex adapts its system management capabilities to securely monitor both physical x86 non-stop servers and virtual hypervisor instances.

4. The AI & Hybrid Cloud Era (2020 – 2026)

  • 2020: HPE ends the sale of older Itanium-based platforms. Reflex fully commits its diagnostic support to modern HPE NonStop X and vNS environments.
  • 2023 – 2024: The NonStop platform embraces AI integrations, expanded SQL/cloud workloads, and integrations with modern DevOps tools. Reflex tools receive updates to accommodate enhanced cyber resilience tracking and modern API-driven services.
  • 2025: HPE celebrates 50 years of the fault-tolerant NonStop computing ecosystem. The Reflex suite provides compatibility for the upgraded, high-capacity hardware iterations running the L25 series OS.
  • 2026: Reflex remains a staple ecosystem management suite for complex enterprise networks, processing and escalating exception conditions, EMS events, and subsystem alerts within the highly available HPE GreenLake consumption models.

The Insider RTLX product at ETI-NET is now called C-Deep for Transaction Monitoring;

C-Deep (Transaction Monitoring)

The Insider Reflex product at ETI-NET is now called Sentinel for NonStop Monitoring;

Sentinel (Nonstop Monitoring)

C-Deep for Transaction Monitoring & Sentinel for HPE NonStop Monitoring

BASE24 and BASE24-eps architecture overview

The BASE24 electronic payment system developed by ACI Worldwide exists in two primary architectural generations:

BASE24 Classic (historically deployed on HPE NonStop / Tandem fault-tolerant hardware) and

BASE24-eps (Enterprise Payments System, built using an object-oriented C++ framework deployable across open systems, z/OS, and cloud infrastructure).

Despite structural differences, both share a highly optimized, component-based transaction routing engine.

BASE24 and BASE24-eps architecture overview
BASE24 architecture overview

Core Structural Component Layers

The component architecture maps the complete end-to-end lifecycle of a financial message (such as ISO 8583) through five distinct functional sub-systems:

1. Network & Message Routing Component (XPNET)

  • Purpose: Coordinates all message traffic across internal processes and physical network nodes.
  • Function: Operates as a specialized middleware network manager that decouples low-level communication links from upper transaction routing layers.
  • Configuration: Relies on a Logical Network Configuration File (LCONF) to define active execution nodes, hardware lines, and physical stations.

2. Perimeter Access Layer (Device Handlers)

  • Purpose: Translates device-specific message protocol formats into the system’s unified internal format.
  • ATM Device Handlers (ATMDH): Manage direct connectivity to automated teller machines, unpack specific vendor dialects (such as Diebold or NCR states), and track terminal hardware statuses.
  • POS Device Handlers (POSDH): Interface with point-of-sale acquirer terminals and merchants.
  • Security Operations: Triggers immediate payload encryption/decryption and Hardware Security Module (HSM) PIN-block translation directly within this ingestion ring.

3. Core Transaction Logic (Authorization System)

  • Purpose: Determines whether a payment request should be accepted, rejected, or modified.
  • Full On-Us Authorization: Inspects internal databases for matching account records, positive balances, and velocity thresholds to issue real-time decisions.
  • Parametric/Negative Checks: Validates card status against offline negative files, usage restrictions, or custom risk parameters.
  • Scripting Engine: Modern BASE24-eps variants execute localized transaction routing scripts via customized operators without forcing a compile rewrite of the core engine core.

4. Boundary Channels (Interchange & Host Interfaces)

  • Interchange Interfaces (ICH): Package and transform the transaction payload into international network profiles (e.g., Visa, Mastercard, regional switches). It handles strict message mapping and regional network check requirements.
  • Host Interfaces (HIF): Create synchronous links back to an institution’s underlying Core Banking system to apply ledger adjustments, check balances, or execute real-time holds.

5. Offline & Administrative Subsystems

  • Extract Component: Gathers active transaction logs and streams filtered payloads out to analytical reporting databases.
  • Refresh Component: Updates terminal operational data, key packages, and card exclusion lists from parent systems down to active execution nodes.
  • Settlement Initiator: Groups, cleanses, and batches net-clearing totals to finalize payment entries into regional clearinghouses.

Architectural Divergence: Classic vs. EPS

The structural design varies significantly depending on the generation of the software deployment:

BASE24 and BASE24-eps architecture overview
BASE24 and BASE24-eps architecture overview

End-to-End Component Transaction Flow

  1. An ATM transaction arrives at the network interface layer managed by XPNET.
  2. The message is routed to the Device Handler, which strips hardware packaging and requests translation from the HSM.
  3. The clean internal message passes to the Authorization Engine.
  4. If it is a “Not-On-Us” card, the engine identifies the destination BIN and transfers routing control to the Interchange Interface.
  5. The Interchange Interface maps the payload to the external scheme standard (such as Visa) and transmits it to the external network.
  6. The outbound network response is unwrapped by the Interchange component and tracked through the core engine to log final response codes.
  7. The transaction safely records inside the active log file, allowing the Extract / Settlement components to pick it up later during batch processing.

BASE24 and BASE24-eps architecture overview

BASE24 and BASE24-eps architecture overview
BASE24 and BASE24-eps architecture overview

HPE NonStop MultiBatch Batch Job Scheduling Overview and Timeline

Overview

MultiBatch is a robust enterprise workload automation and job scheduling tool designed specifically for the HPE NonStop parallel architecture. Developed originally by Insider Technologies and subsequently managed/distributed alongside partners like ETI-NET, it enables organization-wide task automation.

MultiBatch provides high-performance, concurrent execution of batch schedules across multiple nodes. It natively supports both Guardian and OSS environments. By utilizing modern graphical user interfaces (GUIs) alongside traditional Pathway components, it eliminates the need for complex, manual, and high-maintenance TACL or JCL scripts.

Core Technical Capabilities

  • Parallel Execution: Uses NonStop architecture to execute batch workloads concurrently across one or multiple nodes.
  • Advanced Scheduling: Drives automated tasks based on time parameters, complex intervals, custom calendars, and direct cross-job dependencies.
  • Reusable Infrastructure: Environment classes—including PARAM, ASSIGN, DEFINE, FD, and environmental variables—can be configured once and safely shared across various jobs.
  • Inbuilt Disaster Recovery: Features automated, built-in monitor recovery mechanisms to preserve execution integrity during hardware or connection failures.
  • Seamless Migration: Simplifies moving production workloads between environments via a deep migration utility that automatically handles environmental translation without manual intervention.

Timeline Breakdown by Year and Version

The evolution of MultiBatch highlights its transition toward broader configuration capacities, simplified environment integrations, and eventual product lifecycle milestones.

2020: Operational and Security Consolidation

  • Version Focus: Pre-v10 Infrastructure (Enterprise Deployments)
  • Key Enhancements:
    • Formalized rigid separation of internal user roles, establishing MBAT.OPS for view-only status monitoring and MBAT.CONFIG for structural schedule maintenance.
    • Refined the “Migrator” module, eliminating manual TACL operations when extracting and inserting batch definitions across network test and production nodes.
    • Added capabilities allowing all MultiBatch jobs to execute securely under the system Batch Monitor Process (BMON) owner or explicitly assigned application user IDs.

2022 (November): MultiBatch Version 10.0 Launch

  • Version Focus: Architecture Restructuring
  • Key Enhancements:
    • Define Classes: Introduced reusable Define Classes to group environments cleanly.
    • Scale Upgrades: Upgraded the main Batch Monitor (BMON) subsystem to actively scale up to 2,500 jobs concurrently.
    • Parameterization: Modified the core configuration boundaries and decoupled utility processes (MBPARHK) to seamlessly process non-step related records across database structures.
    • Clean Up: Formally deprecated legacy components including UTCSV to reduce technical debt.

2023 (February): MultiBatch Version 10.1 Refinement

  • Version Focus: OSS Overhaul & Operational Control
  • Key Enhancements:
    • OSS Reworking: Re-engineered and optimized support for Open System Services (OSS) processes, granting them equal parity with traditional Guardian tasks.
    • On-Demand Execution: Enabled ad-hoc “On Demand Job” invocation directly through user channels without altering master schedules.
    • Conditional Variables: Extended character limits for Conditional Parameter values up to 100 characters.
    • Subsystem Unification: Consolidated Event Timer processing and Conditional Parameters fully into standard MultiBatch menus, auditing frameworks, and security tracking.
    • Control Commands: Integrated the SWITCH BMON command line directive to easily pass control between operational monitors.
    • Interface Upgrade: Rolled out an entirely new Ops GUI Server to modernize scheduling visibility.

Current Era: Version 10.2 Maintenance & Commercial Sunset

  • Version Focus: Version 10.2 / Product Lifecycle Transition
  • Key Milestones:
    • MultiBatch 10.2: Operates as the current, stable production tier delivered via ETI-NET, featuring deep parameterization and centralized network deployment protocols.
    • Commercial End of Life: As of March 1, 2026, new software licenses for Multi-Batch are no longer available for purchase. The software has officially reached the end of its commercial sales life.
    • Ongoing Support: Existing license holders retain full permission to execute, maintain, and run the product inside their environments according to their long-term licensing agreements.

HPE NonStop MultiBatch Batch Job Scheduling Overview and Timeline

HPE Nonstop Technology Architecture – specialized, 100% fault-tolerant infrastructure

The official HPE Nonstop Technology Architecture is a specialized, 100% fault-tolerant infrastructure built with a tightly integrated hardware and software stack designed to eliminate any single point of failure. Formal instruction and architectural frameworks have been modernized under the newly relaunched HPE Nonstop Compute Training Portfolio curriculum.

Originally developed by Tandem Computers in 1976, the platform eventually became part of Hewlett Packard Enterprise (HPE). Unlike standard servers that can crash due to a single component failure, NonStop uses a tightly integrated, “shared-nothing” architecture to ensure that if a hardware or software component fails, another instantly takes over with zero downtime or data loss.

Core Architectural Features

To understand how HPE NonStop works, you need to understand its unique design principles:

  • Shared-Nothing Architecture: Every processor has its own dedicated memory, I/O channels, and copy of the operating system. No single component is shared, eliminating any single point of failure.
  • Process Pairs: Applications run using a primary process and a backup process on a different processor. The primary process constantly copies its state to the backup. If the primary fails, the backup immediately takes over.
  • Massive Scalability: Systems can scale up seamlessly from small distributed environments to massive clusters containing up to 24,000 processor cores without interrupting running operations.
  • Hardware Platform: The modern software environment runs on industry-standard x86 architectures, available as physical server racks (like the HPE NonStop NS9 X5) or as virtualized instances in hybrid cloud environments.

Dual Operating Environments

HPE NonStop runs a specialized operating system called NonStop OS. Inside this OS, developers and administrators interact with two distinct environments:

  • Guardian Environment: The native, proprietary environment optimized for high-volume Online Transaction Processing (OLTP). It handles tasks sequentially through process-oriented manually-started jobs rather than traditional automated queues.
  • Open System Services (OSS): A UNIX-like, POSIX-compliant environment built on top of the NonStop kernel. This allows organizations to run standard open-source applications, tools, and scripts natively alongside Guardian.

Ecosystem and Use Cases

HPE NonStop is rarely used for standard office automation or basic web hosting. Instead, it serves as the backbone for global industries where an hour of downtime could cost millions of dollars:

  • Financial Transactions: Powers global stock exchanges, automated teller machines (ATMs), and retail point-of-sale credit card processing, eg. BASE24.
  • Travel and Logistics: Runs critical airline reservation systems and real-time cargo routing infrastructure.
  • Database Management: Features its own highly secure, distributed database engine called NonStop SQL, which guarantees absolute data integrity across all transactions.
  • Modern Development: Supports traditional languages like COBOL85 and ANSI C, alongside modern DevOps integrations like Git, Ansible, and Eclipse-based IDE environments.

If you plan to work directly with these systems, you can explore formal pathways like the Concepts and Facilities for HPE NonStop Systems course provided by HPE Education Services.


Core Architectural Layers (Diagram Blueprint)

An architectural blueprint of an HPE NonStop environment typically separates the layout into three core interdependent layers:

  • Hardware & Fabric Layer: Consists of independent, loosely-coupled Processor Nodes (handling up to 24,000 cores globally) connected via an ultra-fast InfiniBand or ServerNet system fabric backbone.
  • I/O & Subsystem Layer: Utilizes Cluster I/O Protocols (CLIMs), splitting tasks between Storage CLIMs (SCLIMs) and Network CLIMs (NCLIMs) to isolate external communication from main processing.
  • Operating System & DB Layer: Runs the NonStop OS, which simultaneously manages the traditional Guardian environment, Open System Services (OSS) for UNIX/Linux paradigms, and the NonStop SQL distributed database engine.

Recommended Architecture Training Curriculum

HPE organizes its technical blueprints into structured educational paths for engineers.

1. Foundational Blueprint Concepts

  • Course Code: U4147S (HPE Nonstop Compute System Fundamentals).
  • Focus: Delivers a top-down view of system goals, transaction processing, and fundamental architecture.
  • Key Modules: Explores Guardian vs OSS, Pathway application management, and basic database interaction.

2. System Operations & Administration

  • Course Code: H1SC3S (HPE Nonstop Compute System Administration I).
  • Focus: Maps physical and virtual components to real-world deployment.
  • Key Modules: Covers Processor Nodes, configuring SCLIMs/NCLIMs, and hands-on fault-scenario testing.

3. Low-Level OS Internals

  • Course Code: U8609S (HPE Integrity Nonstop Operating System Architecture).
  • Focus: Deep dive into runtime architecture, process control, and memory allocation.
  • Key Modules: Focuses on Inter-process Message Systems, synchronization mechanisms, and system debugging.

Training Delivery Options

Enrolling via HPE Education Services grants access to various professional development features:

  • HPE vLabs: Direct sandbox access to practice configuration and live fault injection inside virtual environments.
  • Digital Learner Credits: Flexible licensing options to assign corporate learning units across teams.
  • Modernized Tracks: Courses have been fully overhauled to support contemporary cloud paradigms and hybrid integration via HPE GreenLake frameworks.

My HPE NonStop (Tandem Computers) Certificates :

HPE NonStop (Tandem) Career Experience at Insider Technologies Limited, ITL
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