VAX – Digital Equipment Corporation (DEC)

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VAX 11-780 intero.jpg

Designer Digital Equipment Corporation
Bits 32-bit
Introduced 1977; 41 years ago (1977)
Design CISC
Type Register-Register
Branching Condition code, indexing, counting
Endianness Little
Page size 512 bytes
General purpose 16× 32-bit, also used for floating-point values

VAX is a discontinued instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC) in the mid-1970s. The VAX-11/780, introduced on October 25, 1977, was the first of a range of popular and influential computers implementing that architecture.

A 32-bit system with a CISC architecture based on DEC’s earlier PDP-11, VAX (“virtual address extension“) was designed to extend or replace DEC’s various PDP ISAs. The VAX architecture’s primary features were virtual addressing (for example demand paged virtual memory) and its orthogonal instruction set.

VAX has been perceived as the quintessential CISC ISA, with its very large number of assembly-language-programmer-friendly addressing modes and machine instructions, highly orthogonal architecture, and instructions for complex operations such as queue insertion or deletion and polynomial evaluation.


VAX 8350 front view with cover removed

The name “VAX” originated as an acronym for virtual address extension, both because the VAX was seen as a 32-bit extension of the older 16-bit PDP-11 and because it was (after Prime Computer) an early adopter of virtual memory to manage this larger address space. Early versions of the VAX processor implemented a “compatibility mode” that emulated many of the PDP-11’s instructions, and were in fact called VAX-11 to highlight this compatibility and that VAX-11 was an outgrowth of the PDP-11 family. Later versions offloaded the compatibility mode and some of the less used CISC instructions to emulation in the operating system software.

Instruction set

The VAX instruction set was designed to be powerful and orthogonal. When it was introduced, many programs were written in assembly language, so having a “programmer-friendly” instruction set was important. In time, as more programs were written in higher-level language, the instruction set became less visible, and the only ones much concerned about it were compiler writers.

One unusual aspect of the VAX instruction set is the presence of register masks at the start of each subprogram. These are arbitrary bit patterns that specify, when control is passed to the subprogram, which registers are to be preserved. Since register masks are a form of data embedded within the executable code, they can make linear parsing of the machine code difficult. This can complicate optimization techniques that are applied on machine code.

Operating systems

The “native” VAX operating system is Digital’s VAX/VMS (renamed to OpenVMS in 1991 or early 1992 when it was ported to Alpha, modified to comply with POSIX standards, and “branded” as compliant with XPG4 by the X/Open consortium).

The VAX architecture and OpenVMS operating system were “engineered concurrently” to take maximum advantage of each other, as was the initial implementation of the VAXcluster facility. Other VAX operating systems have included various releases of BSD UNIX up to 4.3BSD, Ultrix-32, VAXELN, and Xinu. More recently, NetBSD and OpenBSD have supported various VAX models and some work has been done on porting Linux to the VAX architecture. OpenBSD discontinued support for the architecture in September 2016.


K 1840, VAX-11/780 clone, 1988, Technical Collections Dresden

The first VAX model sold was the VAX-11/780, which was introduced on October 25, 1977 at the Digital Equipment Corporation’s Annual Meeting of Shareholders. Bill Strecker, C. Gordon Bell‘s doctoral student at Carnegie Mellon University, was responsible for the architecture. Many different models with different prices, performance levels, and capacities were subsequently created. VAX superminicomputers were very popular in the early 1980s.

DEC VAX 11/780-5 computer.

For a while the VAX-11/780 was used as a standard in CPU benchmarks. It was initially described as a one-MIPS machine, because its performance was equivalent to an IBM System/360 that ran at one MIPS, and the System/360 implementations had previously been de facto performance standards. The actual number of instructions executed in 1 second was about 500,000, which led to complaints of marketing exaggeration. The result was the definition of a “VAX MIPS,” the speed of a VAX-11/780; a computer performing at 27 VAX MIPS would run the same program roughly 27 times faster than the VAX-11/780. Within the Digital community the term VUP (VAX Unit of Performance) was the more common term, because MIPS do not compare well across different architectures. The related term cluster VUPs was informally used to describe the aggregate performance of a VAXcluster. (The performance of the VAX-11/780 still serves as the baseline metric in the BRL-CAD Benchmark, a performance analysis suite included in the BRL-CAD solid modeling software distribution.) The VAX-11/780 included a subordinate stand-alone LSI-11 computer that performed microcode load, booting, and diagnostic functions for the parent computer. This was dropped from subsequent VAX models. Enterprising VAX-11/780 users could therefore run three different Digital Equipment Corporation operating systems: VMS on the VAX processor, and either RSX-11M or RT-11 on the LSI-11.

The VAX went through many different implementations. The original VAX 11/780 was implemented in TTL and filled a four-by-five-foot cabinet with a single CPU. CPU implementations that consisted of multiple ECL gate array or macrocell array chips included the VAX 8600 and 8800 superminis and finally the VAX 9000 mainframe class machines. CPU implementations that consisted of multiple MOSFET custom chips included the 8100 and 8200 class machines. The VAX 11-730 and 725 low end machines were built using bit-slice components.

VAX 11/750

The MicroVAX I represented a major transition within the VAX family. At the time of its design, it was not yet possible to implement the full VAX architecture as a single VLSI chip (or even a few VLSI chips as was later done with the V-11 CPU of the VAX 8200/8300). Instead, the MicroVAX I was the first VAX implementation to move some of the more complex VAX instructions (such as the packed decimal and related opcodes) into emulation software. This partitioning substantially reduced the amount of microcode required and was referred to as the “MicroVAX” architecture. In the MicroVAX I, the ALU and registers were implemented as a single gate-array chip while the rest of the machine control was conventional logic.

A full VLSI (microprocessor) implementation of the MicroVAX architecture arrived with the MicroVAX II’s 78032 (or DC333) CPU and 78132 (DC335) FPU. The 78032 was the first microprocessor with an on-board memory management unit The MicroVAX II was based on a single, quad-sized processor board which carried the processor chips and ran the MicroVMS or Ultrix-32 operating systems. The machine featured 1 MB of on-board memory and a Q22-bus interface with DMA transfers. The MicroVAX II was succeeded by many further MicroVAX models with much improved performance and memory.

Further VLSI VAX processors followed in the form of the V-11, CVAX, CVAX SOC (“System On Chip”, a single-chip CVAX), Rigel, Mariah and NVAX implementations. The VAX microprocessors extended the architecture to inexpensive workstations and later also supplanted the high-end VAX models. This wide range of platforms (mainframe to workstation) using one architecture was unique in the computer industry at that time. Sundry graphics were etched onto the CVAX microprocessor die. The phrase CVAX… when you care enough to steal the very best was etched in broken Russian as a play on a Hallmark Cards slogan, intended as a message to Soviet engineers who were known to be both purloining DEC computers for military applications and reverse engineering their chip design.

In DEC’s product offerings, the VAX architecture was eventually superseded by RISC technology. In 1989 DEC introduced a range of workstations and servers that ran Ultrix, the DECstation and DECsystem respectively, based on processors that implemented the MIPS architecture. In 1992 DEC introduced their own RISC instruction set architecture, the Alpha AXP (later renamed Alpha), and their own Alpha-based microprocessor, the DECchip 21064, a high performance 64-bit design capable of running OpenVMS.

In August 2000, Compaq announced that the remaining VAX models would be discontinued by the end of the year. By 2005 all manufacturing of VAX computers had ceased, but old systems remain in widespread use.

The Stromasys CHARON-VAX and SIMH software-based VAX emulators remain available.

Processor architecture

MicroVAX 3600 (left) with printer (right)

DEC VAX registers
31 . . . 23 . . . 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 (bit position)
General registers
R0 Register 0
R1 Register 1
R2 Register 2
R3 Register 3
R4 Register 4
R5 Register 5
R6 Register 6
R7 Register 7
R8 Register 8
R9 Register 9
R10 Register 10
R11 Register 11
R12 / AP Register 12 / Argument Pointer
R13 / FP Register 13 / Frame Pointer
R14 / SP Register 14 / Stack Pointer
R15 / PC Register 15 / Program Counter
Status flags
N Z V C Condition Code Register
Designer Digital Equipment Corporation
Bits 32 bits
Introduced 1977
Design CISC
Type Memory-Memory
Encoding Variable (1 to 56 bytes)
Branching Condition code
Endianness Little
Extensions PDP-11 compatibility mode, VAXvector
Open No
General purpose 16
Floating point uses the GPRs

Virtual memory map

The VAX virtual memory is divided into four sections, each of which is one gigabyte (In the context of addressing, 230 bytes) in size:

Section Address Range
P0 0x000000000x3fffffff
P1 0x400000000x7fffffff
S0 0x800000000xbfffffff
S1 0xc00000000xffffffff

For VMS, P0 was used for user process space, P1 for process stack, S0 for the operating system, and S1 was reserved.

Privilege modes

The VAX has four hardware implemented privilege modes:

No. Mode VMS Usage Notes
0 Kernel OS Kernel Highest Privilege Level
1 Executive File System
2 Supervisor Shell (DCL)
3 User Normal Programs Lowest Privilege Level

Processor status register

31 30 29 27 26 25 23 21 20 15 7 6 5 4 3 2 1 0
Bits Meaning
31 PDP-11 compatibility mode
30 trace pending
29:28 MBZ (must be zero)
27 first part done (interrupted instruction)
26 interrupt stack
25:24 current privilege mode
23:22 previous privilege mode
21 MBZ (must be zero)
20:16 IPL (interrupt priority level)
15:8 MBZ (must be zero)
7 decimal overflow trap enable
6 floating-point underflow trap enable
5 integer overflow trap enable
4 trace
3 negative
2 zero
1 overflow
0 carry

Addressing modes

The SPEC-1 VAX, a VAX 11/780 used for benchmarking, showing internals

The VAX supports many addressing modes: literal, register, postincrement, predecrement, register deferred, postincrement deferred, predecrement deferred, displacement (byte, word, long), displacement (byte, word, long) deferred; also indexed, which may be combined with many of these. An “immediate” mode is synonymous with program counter (PC) postincrement, and many addressing modes could use the program counter (which is also R15) instead of other registers. This provided for easy generation of position-independent code through “PC-relative” addressing. The VAX also has some “load effective address” instructions, which do not access memory but compute the address that should be used.

VAX-based systems

The first VAX-based system was the VAX-11/780, a member of the VAX-11 family. The high-end VAX 8600 replaced the VAX-11/780 in October 1984 and was joined by the entry-level MicroVAX minicomputers and the VAXstation workstations in the mid-1980s. The MicroVAX was superseded by the VAX 4000, the VAX 8000 was superseded by the VAX 6000 in the late 1980s and the mainframe-class VAX 9000 was introduced. In the early 1990s, the fault-tolerant VAXft was introduced, as were the Alpha compatible VAX 7000/10000. A variant of various VAX-based systems were sold as the VAXserver.

Cancelled systems

Cancelled systems include the “BVAX“, a high-end ECL-based VAX, and two other ECL-based VAX models: “Argonaut” and “Raven“. A VAX known as “Gemini” was also cancelled, which was a fall-back in case the LSI-based Scorpio failed. It never shipped.


A number of VAX clones, both authorized and unauthorized, were produced. Examples include:

  • Systime Ltd. of the United Kingdom produced clones of early VAX models such as the Systime 8750 (equivalent to the VAX 11/750).
  • Norden Systems produced the ruggedized, Military-specification MIL VAX series.
  • The Hungarian Central Research Institute for Physics (KFKI) produced a series of clones of early VAX models, the TPA-11/540, 560 and 580.
  • The SM 52/12 from Czechoslovakia, developed at VUVT Žilina (today Slovakia) and produced from 1986 at ZVT Banská Bystrica (today Slovakia).
  • The East German VEB Robotron K 1840 (SM 1710) was a clone of the VAX-11/780 and Robotron K 1820 (SM 1720) was a copy of the MicroVAX II.
  • The SM-1700 was a Soviet clone of the VAX-11/730, SM-1702 was a clone of MicroVAX II and SM-1705 was a clone of VAX-11/785.


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